1. Technical Field
The present invention relates to a multi-layered wiring substrate and a method of manufacturing the same.
2. Background Art
A multi-layered wiring substrate includes a pad for mounting a connector in a front surface and a rear surface (hereinafter referred to as related art 1). Accordingly, when the connector is connected to a signal pattern in an inner layer of the multi-layered wiring substrate, this connection is performed as shown in FIG. 6. First, a through hole a is formed. Then, a conductor provided in an inner wall face of the through hole a is connected to a pad b on a front surface. Then, a connector 7 is connected to the pad b.
Japanese Unexamined Patent Application Publication Nos. 8-307051, 11-177235, and 11-266077 each discloses a multi-layered wiring substrate. In the multi-layered wiring substrate disclosed in Japanese Unexamined Patent Application Publication Nos. 8-307051, 11-177235, and 11-266077, a through hole is formed on a cutting plane line of the multi-layered wiring substrate. Further, the multi-layered wiring substrate is formed by forming a conductor in an inner wall face of the through hole and cutting the multi-layered wiring substrate along with a cutting plane line thereof.
When the multi-layered wiring substrate of the related art 1 is employed, the size of the substrate needs to be increased when not all the elements can be mounted on the substrate. Alternatively, a plurality of substrates need to be prepared in the multi-layered wiring substrate of the related art 1. Accordingly, it is difficult to mount the elements in high density.
In the multi-layered wiring substrate disclosed in Japanese Unexamined Patent Application Publication Nos. 8-307051, 11-177235, and 11-266077, a halved through hole is formed in an edge face of the multi-layered wiring substrate. Then the conductor is formed in the inner wall face of the through hole. However, the conductor formed in the inner wall face does not function as a pad.